In a manufacturing process for forming a fine pattern on a substrate for a semiconductor and a liquid crystal, for example, a shape of a formed pattern is evaluated as setting conditions of manufacturing equipment or monitoring of a status change in a manufacturing process. In particular, the setting conditions of lithography or the monitoring are evaluated using a pattern which is formed by change of the lithography focus and dose conditions within a wafer surface. Such a wafer for evaluation is called a Focus Exposure Matrix (FEM) wafer.
In the setting conditions using the FEM wafer and the monitoring, a pattern as an object of the evaluation is called a hot spot and is determined by a simulation based on design data. The invention where a pattern on an FEM wafer is evaluated using a critical dimension measurement Scanning Electron Microscope (SEM), disclosing the invention to visually judge which chip is in normal exposure conditions or in exposure conditions with an error in Patent Document 1.
Heretofore, the hot spot has been extracted by the simulation, and a position on the wafer corresponding to the hot spot thus extracted has been actually observed to judge whether the hot spot is defective, thereby evaluating the risk of the hot spot.